DARPA’s PIPES program announces research teams
Advances in digital microelectronics have enabled indispensable capabilities for the Department of Defense (DoD) in the fields of information processing, sensors, and communications. Increasingly, system performance in these domains is constrained not by the limits of computation at individual chips, but rather by the electrical data movement between them. The energy efficiency and data bandwidth of electrical interconnects between integrated circuits (ICs) has failed to keep pace with improvements in transistor technology.
To address this challenge, DARPA developed the Photonics in the Package for Extreme Scalability (PIPES) program, which aims to expand the use of optical signaling for data transfer and place high-bandwidth photonics within the package of application-specific integrated circuits (ASICs) and field-programmable gate arrays (FPGAs). By targeting challenging goals for signaling efficiency and bandwidth density, PIPES seeks to enable disruptive system scalability and new system architectures capable of supporting emerging data-intensive applications for the commercial and defense industries.
Recently, DARPA selected teams to take on three research areas under the PIPES program. These efforts span the development and integration of the optical signaling technology for next-generation digital microelectronics, particularly targeting defense-relevant applications; the creation of component technologies and advanced link concepts to enable even greater technical performance; and the exploration of novel approaches to address the challenges and opportunities PIPES technologies present to system architects. In addition to the development of new technologies, PIPES is working with leading organizations in the microelectronics industry to establish a domestic ecosystem that ensures enduring access to advanced photonics for digital microelectronics for both defense and commercial uses.
PIPES’ first research area is focused on the development of high-performance optical input/output (I/O) technologies packaged with advanced ICs, including FPGAs and ASICs. Two research teams led by Xilinx Corporation and Intel will take on this research area. The resulting technologies will enable ICs with unprecedented bandwidth density, energy efficiency, and reach. In addition, researchers from Lockheed Martin, Northrop Grumman, Raytheon, and BAE Systems will help inform the development of these optical I/O technologies to ensure they address the requirements of current and future defense needs. The researchers will also investigate which defense applications could benefit most from this technology.
“The benefits of optical signaling in digital systems have been recognized for a long time,” said Dr. Gordon Keeler, the DARPA program manager leading PIPES. “The integration of photonics within the package will have enormous benefits for commercial and defense applications, but it comes with considerable challenges. PIPES researchers are working to solve practical technical problems to meet the ambitious goals of the program, which include enabling I/O data rates up to 100 Terabits per second (Tbps) at signaling energies below one picoJoule per bit (pJ/bit). At the same time, the teams are studying how to tailor their technologies to address national security applications where operating conditions may be very demanding.”
As chip technology and compute capacity continue to advance against the trajectory of Moore’s Law, digital interconnects need to progress along with them. Major improvements in signaling efficiency, bandwidth density, and integration sophistication will be required to accommodate future I/O demands. As such, the second research area under PIPES aims to push the optical I/O technologies an order of magnitude beyond even what Xilinx Corporation and Intel Federal seek to accomplish.
“To help establish appropriate benchmarks for this research area, we first projected how much data will need to be transported from leading-edge ICs in the 2028 timeframe. Compared to the data capacity of a modern chip today, we may need up to 100X more off-chip I/O. That’s a petabit per second – roughly the equivalent of the entire world’s internet traffic today – but from a single chip. This is an aggressive benchmark, and we expect the technologies developed in this research area will be less mature at the program’s conclusion, but, if successful, we’ll position photonics to enable disruptive change in future microelectronic systems.”
The research teams selected to explore component technologies and advanced link concepts for novel approaches to in-package optical I/O include:
- Sandia National Laboratories
- University of California, San Diego
- University of California, Santa Barbara
- Columbia University
- The University of Pennsylvania
The final research area of the program is exploring system-level issues and opportunities created by high-performance optical I/O technologies for system architects. The University of California, Berkeley is taking on this research.
“If we can seamlessly integrate optical I/O with advanced ICs – and reduce the energy and latency of data movement enough – we eliminate the need to keep data local. It is a major paradigm shift, an opportunity to employ completely different system architectures. Take optical switching, for example. As data increasingly moves on optical fibers and can be routed long distances, how should we use distributed, disaggregated, and flexible system concepts? This research area will focus on creating novel optical packaging approaches and optical switching technologies to support potential opportunities that emerge through PIPES,” said Keeler.